Danish Kapoor
Danish Kapoor

The 2nm race has begun: Samsung is determined to overtake TSMC (and Intel)

TSMC and Samsung maintain a peculiar pulse. One that Intel wants to join in 2025. These three companies are the largest semiconductor manufacturers on the planet, although in recent years the Taiwanese TSMC and the South Korean Samsung They have surpassed Intel very forcefully thanks to the greater sophistication of his avant-garde lithographs. For these two companies, having the most advanced nodes is important because this milestone attracts customers, and TSMC has traditionally led the market in this area.

Samsung seems determined to turn the situation around. Both companies began large-scale production of 3nm chips last year, and we have known for some time that, as might be expected, they are deep in the development of their 2nm lithography. In fact, Intel is too. At the beginning of last February Wang Rui, the president of Intel’s subsidiary in China, stated that her engineers have already completed the development of their 2 and 1.8 nm integration technologies.

In any case, Samsung wants to lead the market for cutting-edge lithographic nodes. And to achieve this, its strategy does not involve expanding the reach of its 3 nm nodes; According to Asian media, its purpose is to adopt as soon as possible its 2nm lithography. This plan is aligned with the statements of Kye Hyun Kyung, the CEO of Samsung’s semiconductor division, in which he has predicted that his company will surpass TSMC and its other competitors (in clear reference to Intel) during the next five years.

2nm lithography isn’t as pretty as chipmakers make it out to be

Kye Hyun Kyung’s statements a priori might seem like bravado to us. Pat Gelsinger, Intel’s CEO, has predicted essentially the same thing, but, not surprisingly, in favor of his own company. Be that as it may, it is interesting to know what these companies are planning and what they intend to do to lead an industry in which TSMC has reigned in recent years without flinching in the slightest. Curiously, this last company, which clearly leads the market, is the one that has adopted a less aggressive stance. It is evident that his relatively comfortable situation allows him to do so.

Nanometers no longer accurately reflect the length of logic gates or other physical parameters

However, users are interested in going beyond what integrated circuit manufacturers tell us, and to do so it is important that we do not overlook two very relevant factors. The first is that nanometers no longer accurately reflect the length of logic gates or another physical parameter, such as the distance between transistors. Every chip maker handles them very freely, which prevents users from directly comparing the lithographs they try to “sell” us. Ideally, they would stop talking about nanometers or angstroms and start describing their integration technologies using an objective parameter, such as the critical dimension.

On the other hand, chip manufacturers in general, and TSMC and Samsung in particular, handle with relative discretion one of the main challenges they face: the performance per wafer of their most advanced lithography can clearly be improved. These two companies are having a hard time achieving at least 70% performance on their 3nm nodes, a figure that would ensure the profitability of this integration technology and attract more customers.

Right now they move between 50 and 60%, so a good part of the cores of each wafer are useless. It is very good that these companies are striving to have the best lithography and be more competitive, but this milestone will be of little use to them if they do not maximize their performance per wafer along the way. And for us consumers, this inefficiency is a problem because it has a direct impact on the price of the chips that the devices we buy incorporate. This is the heart of the matter.

Cover image: Samsung

More information: DigiTimes Asia

Danish Kapoor