The plans of the Samsung subsidiary specialized in the manufacturing of semiconductors are very ambitious. As much as those of Intel and TSMC in the medium term. Maybe even more so. In 2025 it plans to introduce large-scale manufacturing using its GAA technology (Gate-All-Around) of 2 nm, and in 2027 it aims to start the production of 1.4 nm GAA integrated circuits. It sounds good, but a priori it does not seem like an itinerary as ambitious as those its two main competitors have in their hands.
And Intel and TSMC plan to start manufacturing 2nm GAA semiconductors in 2024 and 2025 respectively. However, there is something very important that is worth not overlooking: Samsung started production of GAA chips on its first-generation 3nm node in June last year. At the moment it is the only integrated circuit manufacturer that is producing GAA chips on MBCFET technology (Multi-Bridge-Channel FET), which a priori gives it an advantage over its competitors that in the medium term can be crucial.
Samsung already has an advantage in the deployment of GAA transistor technology
Before moving forward, it is worth briefly investigating the GAA MBCFET technology on which this South Korean company is structuring its semiconductor strategy for the coming years. The purpose of this innovation is outperform FinFET technology on a crucial parameter: performance per watt. Integrated circuits with FinFET transistors began to be manufactured on a large scale at the beginning of the last decade, so it is a mature technology that TSMC, Intel and Samsung know very well and will not abandon easily. Still, in the future GAA transistors will reign.
Samsung will increase the number of ‘nanosheets’ from three to four when it begins chip manufacturing on its 1.4nm node
Samsung claims that its GAA MBCFET technology on its second-generation 3nm node allows it to manufacture chips with 50% lower consumption than its 5nm integrated circuits, 30% higher performance and 35% more area. restrained. Sounds good. However, there is something else. Something that is also important. And Jeong Gi-Tae, vice president of the Samsung subsidiary that is dedicated to the manufacture of integrated circuits, has assured just a few days ago that his goal is to increase the number of nanosheets (we can translate it in Spanish as nanoplates or nanosheets) three to four when the chip manufacturing begins at its 1.4 nm node.
The structure of GAA MBCFET transistors is different from that of conventional GAA transistors (we explained it in detail in the article we dedicated to them last year), which, according to Samsung, increases the current flowing through the transistor and requires a lower operating voltage. In practice, what this company pursues is have the best transistors of the industry in 2027, which will be, as we have seen, the year in which this innovation will reach its 1.4 nm node. It is clear that Intel and TSMC are not going to remain passive in the meantime, so in all likelihood over the next three years the competition between the three largest chip manufacturers is going to be fierce.
Jeong Gi-Tae’s statement of intent comes just two weeks after Kye Hyun Kyung, the CEO of Samsung’s semiconductor division, officially announced that they are going to adopt their 2nm lithography as soon as possible instead of expanding the range of its 3nm nodes. It will be interesting to see how they deal along the way with the efficiency of their technology and the minimization of the cores of each wafer that are useless. Whatever the chip manufacturers do, we can be sure of one thing: it is in the interest of users to compete among themselves aggressively because the technology will develop more quickly, the performance of the chips will improve and their price will be lower.
Cover image: Samsung
More information: DigiTimes Asia