Montage Technology announced that the DDR5 clock driver chip called CK01P has entered mass production. The component is designed to support data rates of up to 9200 MT/s in next-generation computer memory modules. While DDR5 supply and memory prices have been on the agenda in recent months, this announcement does not directly address the prices; It concerns the production of one of the parts required for modules that will operate stably at higher speeds.
CK01P is not a RAM chip. A separate interface chip regulates the clock signal to the memory module. As the data rate increases, it becomes more difficult to transmit the signal at the right time and sufficiently stable. The clock driver undertakes this task, especially in modules with long circuit paths and multiple memory chips. Therefore, it does not increase the capacity of the memory the consumer purchases; helps design a high-speed module.
The company states that the chip complies with the JEDEC DDR5CKD01 clock driver specification. Module formats targeted include CUDIMM in desktops, CSODIMM in laptops, and other next-generation DDR5 schemes. CAMM support is also counted in the statement. However, just because a chip technically supports 9200 MT/s does not mean that this speed will be automatically provided on every motherboard and processor.
Montage offers three operating modes for the CK01P: single PLL, double PLL and PLL bypass. PLL refers to the circuit that regulates the timing of the clock signal. Different modes allow manufacturers to choose the appropriate configuration based on the motherboard and module design. It is also stated that the delay per channel can be programmed and the output characteristics can be adjusted via control registers.
What does 9200 MT/s mean for the user?
MT/s represents the number of million transfers of memory per second. The value of 9200 MT/s is a limit on theoretical data transfer rate; In practice, the benefit achieved depends on the workload, memory timings, and other components of the system. For example, a productivity app that heavily demands memory bandwidth as daily web browsing will not produce the same results.
CK01P’s zero phase delay clock architecture aims to accommodate different memory module circuit paths. Turning off unused clock outputs is also an option to reduce power consumption. At this point, the company does not disclose a valid watt saving figure for each system. Therefore, it is not possible to say that the new chip alone will significantly extend laptop battery life.
The mass production announcement indicates that memory module manufacturers will have access to the component. However, no on-sale date or price for a specific retail RAM kit using CK01P has been announced. In addition, it is a separate decision for which products computer manufacturers will choose this component. Exact product information for users will become clear with memory and computer manufacturers’ own model announcements.
In addition to the CK01P, Montage also supplies the SPD and power management chips used in the modules. This may offer manufacturers the option of purchasing multiple interface parts from the same supplier. On the other hand, the actual capacity and price dynamics in the memory market depend on the production of DRAM chips. CK01P news describes the development of this chain in terms of speed and signal reliability.